Improved synchronization, channel estimation, and simplified LDPC decoding for the physical layer of the DVB-T2 receiver
- Doaa H Sayed^{1}Email author,
- Maha Elsabrouty^{2} and
- Ahmed F Shalash^{3}
DOI: 10.1186/1687-1499-2013-60
© Sayed et al.; licensee Springer. 2013
Received: 8 March 2012
Accepted: 4 February 2013
Published: 4 March 2013
Abstract
The newly developed 2nd generation standard for digital video broadcasting (DVB-T2) emerges as a significant upgrade over its first generation predecessor DVB-T. The DVB-T2 standard targets an increased system throughput by at least 30% over the DVB-T. This article introduces algorithms in the signal processing chain to improve the mobile operation for DVB-T2. The proposed modified synchronization blocks, along with the improved channel estimation, show significant improvement compared to the results reported in the DVB-T2 implementation guide. In addition, state-of-the-art low-complexity algorithms in the bit processing chain, particularly in the LDPC decoder, are used to provide robustness and support throughput increase, while reducing the implementation complexity. The integrated system is simulated including implementation effects. The simulation results confirm the enhanced performance of the developed integrated model and provide better results compared to those reported in literature.
1. Introduction
The first generation terrestrial digital video broadcasting standard, DVB-T, introduced a breakthrough in TV transmission with well-structured transmission chain that is based on OFDM and powerful forward error correction. Recently, the state-of-the-art technology in the digital communication and the economics of digital transmission has developed considerably, enabling a second generation of the DVB standards to emerge, DVB-T2.
The DVB-T2 standard was introduced in 2010 [1], providing an advancement of the terrestrial video transmission. DVB-T2 can achieve a capacity increase by at least 30%. compared to its predecessor DVB-T [2]. In fact, DVB-T2 is taking serious steps to effectively replace the DVB-T in Europe. Several innovative business models to benefit from its improved capacity and performance have been developed [3]. However, the ambitious increase in the throughput can be useful under mobile channel conditions only if the DVB-T2 receiver is carefully designed. More specifically, the channel estimation and synchronization blocks play the main role in enhancing the performance in mobile reception scenarios.
This article focuses on improving the performance of channel estimation and synchronization blocks along with a low-complexity LDPC decoder. A modification to the synchronization block is added to improve its performance and eliminate the need for an extra timing synchronization stage. Efficient implementation, with improved performance channel estimation, is employed to better suit the mobile channel compared to the rather limited channel estimation proposed in the DVB-T2 implementation guide [4]. On the other hand, a low-complexity layered decoder is employed to reduce the implementation cost of the LDPC decoder. By combining these modifications together, an enhanced performance lower complexity DVB-T2 receiver is obtained. Numerical results show improved performance of the integrated design when compared to results reported in an example existing industrial solution [5] as well as improved performance of the individual targeted blocks when compared to the implementation guide [4].
The remainder of the article is organized as follows: Section 2 is dedicated to the improvement in the receiver signal processing chain, namely, the introduced algorithms for synchronization and channel estimation. Section 3 highlights the LDPC decoder employed in the receiver along with possible efficient storage procedure of the parity check matrix which helps in reducing the complexity and memory requirement. Section 4 introduces the integrated DVB-T2 model simulation results in different channel conditions. Section 5 presents a conclusion and summary of the study.
2. Improved DVB-T2 synchronization and channel estimation design
2.1. Synchronization
- (i)
Timing synchronization: Coarse time synchronization (Frame synchronization), and fine timing synchronization.
- (ii)
Frequency synchronization: Both fine and CFO estimation and compensation.
2.1.1. Coarse time synchronization
In this section, we propose a modification to the coarse time synchronization block to improve its performance. This is done in two steps: (1) Changing the correlation circuit involved in the detection of preamble P1. (2) Threshold comparison circuit with emphasis on choosing an appropriate threshold level.
2.1.2. CFO
The fractional part of the frequency offset is estimated and compensated using the algorithm in the DVB-T2 implementation guide [4]. The integral part of frequency offset is referred to as CFO. CFO can be estimated in two stages using P1 and P2 symbols in the frequency domain. The DVB-T2 implementation guide does not disclose a specific detailed procedure to estimate and compensate the CFO. In the following we present our proposed modified CFO estimation and compensation, which is based on a modification of the algorithm in [8] to improve its performance when applied to the DVB-T2 signal.
2.2. Channel estimation
The channel estimation suggested by the DVB-T2 implementation guide is a linear interpolation channel estimator in both time and frequency directions, which has the advantage of low complexity but its performance is very poor in fading channels. Instead we employ a robust estimator that does not require the channel profile knowledge. Although its implementation complexity is comparable to the linear channel estimator, the performance of the robust estimator is, by far, superior to the linear estimator currently reported in the DVB-T2 implementation guide.
In general, DVB-T2 operation in fading channels is directly affected by the channel estimation technique used. The choice of the channel estimation becomes more crucial with the DVB-T2 migrating to mobile application. A careful inspection of the channel estimation utilized in the DVB-T2 implementation guide reveals its reliance on 1D cascaded linear interpolation in time and frequency domains. However, the performance of this first-order interpolation is generally mediocre [9]. The literature of channel estimation classifies the estimator types into two main categories: Decision directed and pilot-aided channel estimation (PACE). The DVB-T2 provides eight different pilot patterns, named PP1,…,PP8, which implies clearly limiting our search to the pool of the PACE algorithms which generally perform better than the decision directed algorithms. In the literature of PACE algorithms, minimum mean square error (MMSE), also referred to as Wiener-based estimator, stands out as the measuring stone to all other algorithms. MMSE provides the optimal linear estimation in the mean square error (MSE) sense [10, 11]. However, a major problem with MMSE estimation is that it requires the knowledge of the exact channel correlation functions. The channel correlation functions are usually unknown and time varying, which makes this technique impractical. This is one of the main reasons the DVB-T2 implementation guide favored linear interpolation. In fact, the linear interpolation method is chosen mainly due to two main factors: the first is its simplicity; the second reason is its independence of the changing channel profile in mobile environment.
In [10], a robust MMSE channel estimation is developed. The robust algorithm is based on using a generic robust correlation function that gives acceptable MSE for all channel correlations. The used solution employs a uniform power delay profile which is longer than the channel delay spread as well as a uniform Doppler spectrum profile with Doppler frequency higher than that of the channel. The main advantage of this algorithm is that the filter coefficients do not depend on the channel profile. They can be calculated a priori and stored in a memory at the receiver side to be applied on the least squared (LS) estimate of the channel at pilot positions. The robust estimator has many advantages: (1) It exhibits performance which is very similar to the optimal channel estimation. (2) It does not require the knowledge of the channel profile and is thus immune to degradation in performance when operating in a fast changing mobile environment. (3) The complexity of the robust estimator is much less than the MMSE solution. The robust estimator depends on a single channel profile and the filter coefficients are pre-computed and stored. This relieves the load of an on-line updated calculation of the channel coefficients which includes the inversion of a high order matrix.
Where $\tilde{H}\left[m\right]$ is the estimated complex channel frequency response at location m on the time/frequency grid, and $\widehat{H}\left[m\right]$ is the LS estimates for pilot locations and the time interpolated pseudo-pilots. C[m_{1}] is the complex Wiener filter coefficients that can be calculated as in [12], and m_{1} belongs to the indices of the nearest LS pilots in the same OFDM symbol to the required subcarrier m. The set P_{ m } represents the N_{ t } pilot locations near m where N_{ t } is the number of the filter coefficient. When utilizing the nearest pilots in the frequency domain estimation, the middle part of the coefficients is periodic. Using this property the calculation process of the robust filter coefficients can be further reduced by up to 90% in some cases. This could be valuable, with the need to store the coefficients for the different pilot patterns and different OFDM sizes.
The simulation configuration for channel estimation
Parameter | Specification |
---|---|
FFT size | 2048 |
Number of available carriers | 1705 |
Signal constellation | 16 QAM |
Guard interval | 1/8 |
Scattered pilot pattern | PP2 |
Channel model | TU6 |
3. Bit processing chain
3.1. Layered decoding for DVB-T2 LDPC codes
LDPC codes are first introduced as linear binary codes [17, 18]. The Tanner graph [19] is used to represent connections and edge links. An edge links the check node i to the variable node j if the element H_{ ij } of the parity check matrix is non-null. Decoding algorithms based on Tanner graphs are iterative, based on exchanging information between parity check nodes and variable nodes. Belief propagation is applied to Tanner graphs to efficiently decode LDPC codes [20, 21].
Soft decoding algorithms dominate the scene in real application of LDPC decoding. In general, LDPC decoding algorithms can be seen as an approximation of belief propagation decoding. Improvements to the belief propagation through scaling have been addressed in several publications [21–24]. Min-Sum decoding is used in our proposed decoder. The main reason for this choice is its relative implementation simplicity and its robustness to quantization errors when implemented on hardware. A modified normalized Min-Sum update is used to speed the convergence of the Min-Sum algorithm [22]. The detailed complexity comparison of the different LDPC codes and their quantized performance is detailed in [22, 23].
To make the encoding and decoding of LDPC codes in DVB-T2 more efficient, the sparse part of the parity check matrix is designed to be in a quasi-cyclic form [25, 26]. Thus, further efficient manipulation of the structure of the parity check matrix can make it suitable for layered decoding [27–29].
Normal frame parameters for layered LDPC decoder
K _{LDPC} | N _{LDPC} | R= R_{code} | Q _{LDPC} |
---|---|---|---|
32400 | 64800 | 1/ 2 | 90 |
38880 | 64800 | 3/5 | 72 |
43200 | 64800 | 2/3 | 60 |
48600 | 64800 | 3/4 | 45 |
51840 | 64800 | 4/5 | 36 |
54000 | 64800 | 5/6 | 30 |
Short frame parameters for layered LDPC decoder
K _{LDPC} | N _{LDPC} | R _{code} | R | Q _{LDPC} |
---|---|---|---|---|
3240 | 16200 | 1/ 4 | 1/ 5 | 36 |
7200 | 16200 | 1/2 | 4/9 | 25 |
9720 | 16200 | 3/5 | 3/5 | 18 |
10800 | 16200 | 2/3 | 2/3 | 15 |
11880 | 16200 | 3/4 | 11/15 | 12 |
12600 | 16200 | 4/5 | 7/9 | 10 |
13320 | 16200 | 5/6 | 37/45 | 8 |
In each sub-iteration, the soft bits are updated and the syndrome is calculated and checked. If the syndrome is zero, a valid codeword is obtained and the decoder concludes the decoding. Otherwise, the decoder proceeds to the next sub-iteration with updated version of soft bits and the process continues until it reaches the maximum number of iterations.
The breakup of the iteration into sub-iterations improves the convergence speed. The number of iterations required for layered decoding is generally half the number of iterations needed for the regular LDPC decoder [27, 28, 32].
3.2. Storage method of the parity check matrix
The quasi-cyclic structure of the sparse part of the parity check matrix can be better exploited to serve the layered structure of the decoding algorithm. In the following, we present one possible way of storing and regenerating the H matrix that is capable of producing the submatrices in each layer separately, without the need to reproduce the whole matrix H at once. Consider the information part, which can be viewed in each layer as Z_{LDPC}P matrices where P is a 360 × 360 matrix and Z_{LDPC}= K_{LDPC}/ 360. These matrices may be zero, identity, shifted version of identity matrix, or (2, 3, and 4) different shifted versions of identity matrix added together. The maximum number of possible shifts is 360 and the maximum number of additions corresponds to the maximum number of 1’s in a column, i.e., equals to 4.
As the 1’s positions in the shifted P matrices are non-overlapping, the addition of the four matrices corresponds to the different shifts. This property can be exploited through substituting with a “for” loop to sequentially regenerate the 1s in the P matrix at hand. The following pseudo code illustrates the general idea of how to reproduce a P matrix in the information part within a certain layer.
Initialize: Matrix at position U_{LDPC} = 0_{360×360};
If P _{shift} (1:4) > 360
Exit;
Else
For i=1:4
For C=1:360
C _{ u } =360×(U _{LDPC} -1)+C
R _{ u } =(P _{shift} (i)+C) mod 360
End
End
End
where U_{LDPC} represents the order of matrix in layer, U_{LDPC} = 1,2,3…,Z_{LDPC,}C represents the column index inside the P matrix, C = 1,…,360, C_{ u } represents column index in the matrix at position U_{LDPC}in the layer, R_{ u } represents row index in the matrix at position U_{LDPC} in the layer.
The information part of H matrix can be stored in Q_{LDPC} × Z_{LDPC} × 4 × 9 bits. The 9 bits represent the four possible shifts P_{shift,t} = 0,…,359, i = 1,…,4. Any number in the P_{shift,t} larger than 359 indicates that the P matrix is all zeros. Q_{LDPC}and Z_{LDPC}are system parameters which are dependent on code rate and frame type (short or normal frame). This storage method operates on the parity matrix to represent it in the closest form to quasi-cyclic submatrices. It is capable of producing the layers separately, and thus suits the operation of the layered decoding that doesnot require all the nodes of the H matrix, but rather the intended layer the decoder operate on. Using the concept of layered decoding can reduce the memory requirements and logic operation by up to 50% [33].
4. Simulation results
5. Conclusion
This article presents modifications to key blocks in the DVB-T2 receiver. Throughout our design of the DVB-T2 receiver physical layer we targeted real-life operation scenario of DVB-T2, taking into consideration the mobile channel. Several new ideas, along with utilizing state-of-the-art algorithms have been developed with two main targets in mind. The first is to provide improved performance suitable for mobile channel conditions and the second is to preserve the low implementation complexity mandated by the nature of a mobile device. The modifications proposed are concerned with the synchronization, channel estimation, and forward error correction decoding of DVB-T2 receiver. In the synchronization block, a modified coarse timing synchronization is presented that solves the problem of the trapezoidal shaped autocorrelation circuit presented in the implementation guide. The CFO is also modified by adding an additional stage to improve the accuracy of the coarse offset estimator. The concept of operation of the modified CFO is carefully selected from the literature. However, it is modified to suit the special nature of pilots used in the DVB-T2. In the channel estimation block, we emphasize and focus the attention on one carefully selected robust channel estimator. The proposed estimator outperforms the legacy zero forcing channel estimator without adding the complexity burden of the optimal MMSE estimator. The layered decoding concept is used in the LDPC along with one possible storage method that rearranges the H matrix to better exploits quasi-cyclic structure. The DVB-T2 receiver results were presented for the integrated performance after applying the modifications. The integrated DVB-T2 system is tested for different code rates and under various channel models. The simulation results prove the improved performance of the proposed DVB-T2 receiver.
Declarations
Acknowledgment
This study was supported by a grant from the NTRA, Egypt.
Authors’ Affiliations
References
- Digital Video Broadcasting (DVB): Framing Structure, Channel coding, and Modulation for digital terrestrial television broadcasting system (DVB-T2). September 2009. ETSI EN 302755v1.1.1Google Scholar
- Vangelista L, Benvenuto N, Tomasin S, Nokes C, Stott J, Filippi A, Vlot M, Mignone V, Morello A: Key technologies for next-generation terrestrial digital television standard DVB-T2. IEEE Commun. Mag. Oct. 2009, 47: 146-153.View ArticleGoogle Scholar
- Sugaris A, Reljin I: DVB-T2 technology improvements challenge current strategic planning of ubiquitous media networks. EURASIP Journal on Wireless Communications and Networking 2012, 2012: 52. http://jwcn.eurasipjournals.com/content/pdf/1687-1499-2012-52.pdf 10.1186/1687-1499-2012-52View ArticleGoogle Scholar
- Digital Video Broadcasting (DVB) ETSI Document A133. Implementation guidelines for a second generation digital terrestrial television broadcasting system (DVB-T2) June 2010.Google Scholar
- Sony CXD2820R DVB-T2 http://www.sony.net/Products/SC-HP/cx_news/vol60/np_cxd2820r.html
- Doblado JG, Baena V, Oria AC, Perez-Calderon D, Lopez P: Coarse time synchronization for DVB-T2. Electron. Lett. May 2010, 46(11):797-799. 10.1049/el.2010.0807View ArticleGoogle Scholar
- Laurenson DI, Cruickshank DGM, Povey GJR: A computationally efficient multipath channel simulator for the COST 207 models. In Digest of the Colloquiutn on Computer Modelling of Communication Systems (94–1 15). London, UK: IEE; May 10th 1994:8/1-8/6.Google Scholar
- Han D-S, Seo J-H, Kim J-J: Fast carrier frequency offset compensation in OFDM systems. IEEE Trans. Consum. Electron. Aug. 2001, 47(3):364-369. 10.1109/30.964122View ArticleGoogle Scholar
- Wang X, Wu Y, Chouinard JY, Lu S, Caron B: A channel characterization technique using frequency domain pilot time domain correlation method for DVB-T systems. IEEE Trans. Consum. Electron. November 2003, 49(4):949-957.View ArticleGoogle Scholar
- Li YG, Cimini LJ Jr, Sollenberger NR: Robust channel estimation for OFDM systems with rapid dispersive fading channels. IEEE Trans. Commun. July 1998, 46(7):902-915.View ArticleGoogle Scholar
- Edfors O, Sandell M, van de Beek J-J, Wilson SK, Brjesson PO: OFDM channel estimation by singular value decomposition. IEEE Trans. Commun. July 1998, 46(7):931-939.View ArticleGoogle Scholar
- Hanzo L, Keller T, Muenster M, Choi B-J: OFDM and MCCDMA for Broadband Multi-User Communications, WLANs and Broadcasting. New York: Wiley; 2003.View ArticleGoogle Scholar
- Li F, Songlin S, Xiaojun J, Hai H: Analysis of pilot patterns and channel estimation for DVB-T2. In Proceedings of 2nd IEEE Conference on Network Infrastructure and Digital Content, (ICNIDC2010). Beijing (China); 2010:609-613.Google Scholar
- Berlekamp ER: Algebraic Coding Theory. New York: McGraw-Hill; 1968.MATHGoogle Scholar
- Massey JL: Shift-register synthesis and BCH decoding. IEEE Trans. Inf. Theory Jan 1969, 15(1):122-127. 10.1109/TIT.1969.1054260MATHMathSciNetView ArticleGoogle Scholar
- Lin Y-M, Chen C-L, Chang H-C, Lee C-Y: A 26.9 k314.5 mb/s soft (32400,32208) bch decoder chip for dvb-s2 system. IEEE J. Solid State Circuits Nov. 2010, 45(11):2330-2340.Google Scholar
- Gallager RG: Low density parity check codes. IRE Trans. Inf. Theory Vol. Jan. 1962, IT-8: 21-28.MathSciNetView ArticleGoogle Scholar
- Gallager RG: Low-Density Parity-Check Codes (MIT Press. Cambridge: MA; 1963.Google Scholar
- Tanner RM: A recursive approach to low complexity codes. IEEE Trans. Inf. Theory Sept. 1981, 27(5):533-547. 10.1109/TIT.1981.1056404MATHMathSciNetView ArticleGoogle Scholar
- MacKay DJC, Neal R: Good codes based on very sparse matrices. Lecture Notes in Computer Science , no. 1025. In 5th IMA Conference on Cryptography and Coding. Edited by: Boyd C. Berlin, Germany: Springer; 1995:100-111.View ArticleGoogle Scholar
- Chen J, Fossorier MPC: Near optimum universal belief propagation based decoding of low-density parity check codes. IEEE Trans. Commun. March 2003, 50(3):406-414.View ArticleGoogle Scholar
- Chen J, Dholakia A, Eleftheriou E, Fossorier MPC, Hu X: Reduced-complexity decoding of LDPC codes. IEEE Trans. Commun. Aug. 2005, 53(8):1288-1299. 10.1109/TCOMM.2005.852852View ArticleGoogle Scholar
- Chen J, Fossorier MPC: Density evolution for BP-based decoding algorithms of LDPC codes and their quantized versions. In Proceedings of the IEEE Globecom. Taipei, Taiwan: R.O.C; Nov. 2002:1026-1030.Google Scholar
- Yazdani MR, Hemati S, Banihashemi AH: Improving belief propagation on graphs with cycles. IEEE Commun. Lett. Jan. 2004, 8(1):57-59. 10.1109/LCOMM.2003.822499View ArticleGoogle Scholar
- Lukasz K, Imed B, Moncef G: LDPC FEC code extension for unequal error protection in DVB-T2 system: design and evaluation. Int. J. Dig. Multimed. Broadcast 2012, 834924: 11. http://www.hindawi.com/journals/ijdmb/2012/834924/Google Scholar
- Tanner M: On quasi-cyclic repeat-accumulate codes. In Proceedings of the 37th Allerton Conference on Communication, Control, and Computing. Allerton House, Monticello, IL, USA; Oct. 1999:249-259.Google Scholar
- Marchand C, Dore J, Canencia L, Boutillon E: Conflict resolution for pipelined layered LDPC decoders. In IEEE workshop on SiPS. Tampere; 2009:220-225.Google Scholar
- Rovini M, Rossi F, Ciao P, L’Insalata N, Fanucci L: Layered decoding of non-layered LDPC codes. In Proceedings of the 9th Euromicro Conference on Digital System Design (DSD). Croatia; Aug-Sept. 2006:537-544.View ArticleGoogle Scholar
- Marchand C, Dor´e J-B, Conde-Canencia L, Boutillon E: Conflict resolution by matrix reordering for DVB-T2 LDPC decoders. In Global Telecommunications Conference. Honolulu, Hawaii, USA; Nov.-Dec. 2009:1-6.Google Scholar
- Hocevar D: A reduced complexity decoder architecture via layered decoding of LDPC codes. In SISP 2004. Austin, Texas, USA; Oct. 2004:107-112.Google Scholar
- Mansour M, Shanbhag N: High-throughput LDPC decoders. IEEE Trans. VLSI Syst. Dec. 2003, 11(6):976-996.View ArticleGoogle Scholar
- Cui Z, Wang Z, Liu Y: High-throughput layered LDPC decoding architecture. IEEE Trans. VLSI Syst. April 2009, 17(4):582-587.View ArticleGoogle Scholar
- Chou S-C, Ku M-K, Lin C-Y: Switching activity reducing layered decoding algorithm for LDPC codes. In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2008). Seattle, WA, USA; May 2008:528-531.View ArticleGoogle Scholar
- Mendicute M, Sobrón I, Martínez L, Ochandiano P: DVB-T2: new signal processing algorithms for a challenging digital video broadcasting standard. Digital Video(In-Tech, 2010) 185-206. ISBN 978-953-7619-70-1
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