Mobile and vehicular channel models
References [6–24] describe different mobile and vehicular channel models that try to reflect the continuously changing conditions of the environment. Most of these models have been developed for SISO transceivers [6–8, 10, 11, 13–15, 18, 19, 21, 23, 24], while a few are specific for multiple-antenna systems [9, 12, 16, 17, 20, 22]. These vehicular models can be also classified depending on the way they were obtained, distinguishing physical (PHY) models [6–8, 15–17, 20–24], empirical models [11–14, 18, 19] and models that mix empirical measurements and PHY developments [9, 10].
Physical models characterize an environment by analyzing the propagation of electromagnetic waves between a transmitter and a receiver. Such models can be very sophisticated and usually require indicating several parameters in order to reproduce accurately the propagation in a specific scenario. Moreover, this kind of models does not depend on the characteristics of the antenna array (number of antennas, polarization, etc.) or the system bandwidth.
Geometry-based stochastic channel models (GSCM) are probably the most popular PHY channel models. A good example is , which describes a 3D wideband channel model for MIMO transceivers that carry out mobile communications.
In regard to empirical vehicular models, it can be observed that most of them have been obtained for the 5 GHz band [9–12, 14, 18, 19], although there are also models for the 2.4 GHz band (e.g. ). Vehicular communications mostly take place in the 5 GHz band: in 1999, the dedicated short range communications (DSRC) spectrum band, a band of 75 MHz at 5.9 GHz, was allocated in the United States, whereas, an equivalent band was allocated in Europe in August 2008 by the European Telecommunications Standards Institute (ETSI) (such entity reserved 30 MHz of spectrum in the 5.9 GHz band for ITS). Nevertheless, our channel emulators cover both the 5 GHz frequency band (see Section “FPGA-based MIMO channel emulator built by upgrading our previous SISO vehicular channel emulator”) and 2.4 GHz (see Section “FPGA-based MIMO channel emulator for the new MIMO 2 × 2 Acosta’s channel model”).
Empirical models are created by analyzing measurements obtained when transmitting over a real environment and then modeling the channel characteristics. Sometimes researchers are not satisfied with the accuracy of their empirical model and they add analytical developments (such as the ones performed for PHY channel models), creating mixed models. For instance,  presents a wideband MIMO vehicular channel model based on a GSCM and 5.2 GHz measurements performed in highways and rural areas.
From all the above-mentioned vehicular models, we decided to use the empirical models described in [5
] for three reasons:
They represent real-world situations and, therefore, contemplate all the factors that influence transmissions in a real vehicular scenario.
They are far less complex than most of PHY models that control the same amount of communication parameters.
They have been traditionally used by the industry to evaluate commercial transceivers. For instance, standards such as IEEE 802.16e and IEEE 802.11n or 3G/beyond-3G telephony have proposed empirical models for the evaluation of their transceivers [25–27].
Of course, the use of empirical channel models have disadvantages: they are difficult to generalize (although there exist hybrid models that mix empirical and theoretical contributions (e.g. )) and they are less accurate than other kinds of models (e.g. PHY models) in certain situations, since they usually require approximations.
Finally, note that the channels modeled in  are based on SISO measurements, but we use them because they have been suggested as a reference for evaluating IEEE 802.11p transceivers. Further investigation is still needed to adapt such channels to multiple-antenna environments, but when that occurs, the transceivers and the channel emulator model presented in this article will continue to be valid.
MIMO channel emulators
There are two kinds of MIMO emulators: commercial and academic. On the one hand, there are many commercial MIMO emulators manufactured by companies such as Azimuth Systems , Agilent , Rhode & Schwarz , Spirent  or Propsim . Most of their MIMO emulators are general-purposed (for instance, Spirent’s SR5500, Rhode’s AMU200A, Propsim’s F8 MIMO OTA or the ACE MX family from Azimuth), although there are some aimed at evaluating specific technologies, like Azimuth’s ACE-400WB/Wi-Fi (that includes the TGn channel models  for evaluating IEEE 802.11n transceivers) or Agilent’s N5106A PXB MIMO Receiver Tester (with built-in LTE and MobileWiMAX channels).
Although commercial emulators work great in most situations, they are expensive and suffer from a clear lack of flexibility when used by researchers to study performance in state-of-the-art wireless channels. The lack of flexibility is mainly in regard to the configuration of non-standard characteristics of the channel (i.e. the number of paths and taps, the fading spectral shapes, the fading Doppler, etc.). Additionally, another important issue arises in the case of vehicular channels: several well-known researchers  state that the main characteristics of a VTV channel resides in the non-constant characteristic of the K-factor, which current channel emulators do not support.
On the other hand, apart from commercial products, several authors have described how they built their own channel emulators. Among the available technologies, microcontrollers and digital signal processors (DSPs) are not valid due to processing and real-time constraints, while application-specific integrated circuits (ASICs) are discarded since their development time is too high for a prototype (although they offer better performance). Thus, the choices could be reduced to complex programmable logic devices (CPLDs) and FPGAs. CPLDs can execute tasks at a faster rate, but FPGAs can deal with more complex designs and they own specific resources (such as counters or arithmetic operator blocks) that are more adequate for implementing a channel emulator. Due to the facts mentioned, FPGAs are probably the most popular hardware technology for developing channel emulators.
Examples of academic MIMO FPGA-based channel emulators are described in [33–40]. Some of them are generic [33–35, 38], while others [36, 37, 39, 40] are specifically oriented towards the implementation of the IEEE 802.11n channels . We would like to point out that none of the studied channel emulators have been explicitly developed for recreating VTV or RTV environments.
One of the main problems when implementing MIMO channel emulators in an FPGA is that they require large designs and, therefore, the use of resources has to be optimized. Although most of the studied channel emulators are able to implement the whole system into only one FPGA, there are examples of channel emulators that distribute computing among different FPGAs . Furthermore, to fit the design into one FPGA, researchers have to save resources using different clever tricks, being one of the most recurrent the off-line generation of the channel coefficients [33, 36, 37, 39]. Also, some authors  achieve to save up to 67% of the FPGA resources by applying the channel coefficients in the frequency domain.
Moreover, it is quite common to implement a Jakes’ simulator (which makes use of the sum-of-sinusoids method) to obtain a good trade-off between performance, used resources and development time (e.g. ). However, although it has been successfully used in the last 40 years, its limitations are still not well understood  and it has problems for creating multiple uncorrelated fading waveforms for frequency selective fading channels and MIMO channels . In fact, different modifications of the Jakes simulator have been proposed to correct such issues and implement Rice/Rayleigh fading channels (e.g. ).
We have detected at least three drawbacks in the above-mentioned academic developments. First, the use of low-level description languages such as very high speed integrated circuit hardware description language (VHDL) results in slow development stages. Although in most cases VHDL is able to obtain resource-efficient FPGA designs, programming can become a cumbersome task that may consume a large amount of time and economic resources. There are new sophisticated tools such as Xilinx System Generator that permit the use of high-level blocks, enabling to build complex designs easier and faster. However, it must be noted that although rapid-prototyping tools increase development speed, they usually generate non-optimized large designs that may not fit into the FPGA. Hence, for large designs, optimizations must be performed.
The second problem we have found is related to the portability of the channel emulator. An ideal channel emulator should be able to work in a stand-alone mode, without needing external devices to generate and transfer channel coefficients to the FPGA. In the reviewed literature PCs are commonly used to generate coefficients [33, 36, 37], although some authors have been able to build more compact systems by using other devices (for instance, in  coefficient generation is performed by an ARM9 processor). Moreover, there is a bottleneck in the number of coefficients that can be transferred from the external device to the FPGA (either due to restrictions on the external device or on the communication buses), what leads to important limitations. For example, in  the externally generated coefficients are stored into a Zero Bus Turnaround RAM (ZBT-RAM) and then sent to the emulator, which is only able to apply such coefficients through a two-minute time interval.
The third drawback of the studied channel emulators is related to scalability. As it can be derived from the results shown in , when we work with a time-domain based channel emulator, the gate count (i.e. the number of 2-NAND logic gates that would be required to implement the same number and type of logic functions) roughly doubles every time we add a transmit and a receive antenna to the system. Therefore, a scalable solution would have to be able to deal with more inputs and outputs without requiring such important hardware complexity increases.
In this article we propose two different approaches aimed at solving the mentioned drawbacks. Both of them make use of Xilinx System Generator to develop highly-configurable channel emulators faster than using an HDL. The System Generator designs are optimized to fit twelve to twenty-four complex path channel emulators into one FPGA. Moreover, although both channel emulators were designed bearing in mind that they had to be able to work in a stand-alone mode, the emulator described in Section “FPGA-based MIMO channel emulator built by upgrading our previous SISO vehicular channel emulator” was specifically built to cause the lowest possible impact on resource-consumption in case of requiring additional transmit/receive antennas, therefore facilitating scalability.